Publisher DOI: 10.1109/ACCESS.2021.3091778
Title: Hardware implementation of a latency-reduced sphere decoder with SORN preprocessing
Language: English
Authors: Bärthel, Moritz 
Knobbe, Simon 
Rust, Jochen  
Paul, Steffen 
Keywords: digital arithmetic; MIMO; SORN; sphere decoding; Unum
Issue Date: 23-Jun-2021
Publisher: IEEE
Journal or Series Name: IEEE access 
Volume: 9
Startpage: 91387
Endpage: 91401
Abstract: 
Unum type-II based Sets-Of-Real-Numbers (SORN) arithmetic is a recently proposed, promising number representation providing fast and low complex implementations of arithmetic operations at the expense of low resolution. The format can be applied for constraining large optimization problems by means of preprocessing. In this work SORN arithmetic is applied for reducing the latency of a Sphere Decoder by excluding a number of solutions in advance. In particular, a comprehensive hardware implementation is presented, consisting of an adapted Sphere Decoder, as well as SORN and matrix preprocessing. Logic and physical synthesis evaluations show that the mean number of visited nodes within the Sphere Decoder can be reduced by up to 76%, resulting in an overall latency reduction of up to 20%. This improvement comes with an area and energy increase of up to 58% and 83%, respectively, compared to a standard Schnorr-Euchner Sphere Decoder.
URI: http://hdl.handle.net/20.500.12738/14159
ISSN: 2169-3536
Review status: This version was peer reviewed (peer review)
Institute: DSI Aerospace Technologie GmbH 
Type: Article
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