FPGA-based Accelerator for FFT-Processing in Edge Computing

Abstract

Edge computing bridges the gap between end devices on the Internet of Things (IoT) and central, server-based IT services by accelerating tasks which otherwise could not be executed on the IoT device itself. The Fast Fourier Transformation (FFT) is used as an example for the arithmetic tasks to be supported. To support such specific applications, we envisage a concept for edge computing in which co-processing is implemented using Field Programmable Gate Arrays (FPGAs). This article first describes certain edge computing requirements using the example of moving drones. This involves the case-by-case reconfiguration of the computation hardware and a handover mechanism from one edge node to another. Then follows the description of an FPGA-based FFT accelerator unit and its extension to an FFT co-processor. The development took place under the proviso that, for example, drones can request different co-processors and that the drones can also change the edge node when changing a radio cell, which results in a handover of the co-processor context. Regarding the FPGA part this means that the co-processor is part of a partially reconfigurable environment, and the co-processor must support the handover mechanisms in terms of hardware. Finally, the need for FPGA resources is analyzed, also in comparison with alternative solutions.