License: | Title: | A Hardware-in-the-Loop Test Module for UART and its Integration into the RIOTEcosystem | Language: | English | Authors: | Yefremov, Yegor | Issue Date: | 17-May-2019 | Abstract: | Hardware-in-the-Loop (HIL) testing ensures that the combination of software and hardware works as specified. In this thesis, we analyze Universal Asynchronous Receiver Transmitter (UART) structure, extend its API in RIOT OS and develop a test suite for the current and extended functionality. The final result of this thesis was a working HIL simulation for UART integrated into RIOT's CI process. Hardware-in-the-Loop (HIL) Tests stellen sicher, dass die Kombination von Software und Hardware wie angegeben funktioniert. In dieser Arbeit analysieren wir die Struktur von einem Universal Asynchronous Receiver Transmitter (UART), erweitern seine API in RIOT OS und entwickeln eine Testsuite für die aktuelle und erweiterte Funktionalität. Das Endergebnis dieser Arbeit war eine funktionierende HIL-Simulation für UART, die in den CI-Prozess von RIOT integriert wurde. |
URI: | http://hdl.handle.net/20.500.12738/8753 | Institute: | Department Informatik | Type: | Thesis | Thesis type: | Master Thesis | Advisor: | Schmidt, Thomas | Referee: | Korf, Franz |
Appears in Collections: | Theses |
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File | Description | Size | Format | |
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thesis.pdf | 2.3 MB | Adobe PDF | View/Open |
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